Salamander Error Correction

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The SALxx320D product is a 256-state Viterbi decoder.

The basic code is a constraint length 9, rate 1/2, 1/3, or 1/4 transparent code which is well suited to channels with predominantly Gaussian noise. The decoder uses the maximum-likelihood decoding (Viterbi) algorithm to decode three convolutional codes. The code is of the non-systematic non-recursive type. The connection polynomials are g0 = 561 and g1 = 753 for the rate 1/2 code, g0 = 557, g1 = 663 and g2 = 711 for the rate 1/3 code, and g0 = 765, g1 = 671, g2 = 513 and g3 = 473 for the rate 1/4 code.

SALxx320D-v	HDL license -- Verilog source code	$contact us
SALxx320D-x	Netlist license -- Xilinx netlist	$contact us

 

Contact us at sales@salamander-ecc.com for more information, or to request a custom designed solution.

 

Reed-Solomon, Viterbi, and Turbo Codes. Salamander Error Correction specializes in the design and marketing of Verilog IP modules for Forward Error Correction.

Salamander Error Correction

5330 Carroll Canyon Rd

San Diego, CA 92121

(858) 373-2112

Fax: (858) 373-1224

sales@salamander-ecc.com

www.salamander-ecc.com