Reed-Solomon Decoder

The SAL10202D product is a systematic Reed-Solomon decoder device over the field GF(256), whose primitive polynomial is p(x) = x⁸ + x⁴ + x³ + x² + 1. It is capable of very high speed operation. Its coefficients are taken from the generator polynomial g(x) = (x - 1)(x - α)(x - α²) ... (x - α^2t-1).

The SAL10202D uses a pipelined architecture, and is capable of handling shortened frames and puncturing without the normal latency and throughput penalty of competing products. The device is optimized for high throughput, erasures-only operation.

Benefits

Optimized for erasure-only decoding

variable erasure correcting ability 2t = 2 to 32

low-latency

fully pipelined

Simple handshake protocol for reliable interfacing

Fully synchronous design

Low area, high speed ~ 800 Mbps operation

Documentation

Datasheet

Ordering Information

SAL10202D-v

HDL license -- Verilog source code

$contact us

SAL10202D-x

Netlist license -- Xilinx netlist

$contact us

Contact us at sales@salamander-ecc.com for more information, or to request a custom designed solution.

Reed-Solomon, Viterbi, and Turbo Codes. Salamander Error Correction specializes in the design and marketing of Verilog IP modules for Forward Error Correction.

Salamander Error Correction

5330 Carroll Canyon Rd

San Diego, CA 92121

(858) 373-2112

Fax: (858) 373-1224

sales@salamander-ecc.com